1. Field of the Invention
Embodiments of the invention relate to semiconductor device fabrication, and, in particular, to the formation of multilayer wiring substrates on which integrated circuits or discrete devices are mounted.
2. Description of Related Art
A variety of mounting structures are known for electronic circuits. Multi-chip modules and hybrid circuits are typically mounted on ceramic substrates that include metallic conductors for interconnecting the components, and the components are typically sealed within a metal or ceramic casing. Complex hybrid circuits typically require equally complex interconnection structure. In such instances it is common to utilize a multilayer substrate comprised of multiple layers of conductors sandwiched between multiple layers of dielectric material. Multilayer substrates are conventionally fabricated by lamination techniques in which metal conductors are formed on individual dielectric layers, and the dielectric layers are then stacked and bonded together.
Various conventional lamination techniques are known, however each has limitations that restricts its usefulness for producing multilayer substrates. High temperature ceramic co-fire (HTCC) lamination techniques form conductors on “green sheets” of dielectric material that are bonded by firing at temperatures in excess of 1500 degrees C. in a reducing atmosphere. The high firing temperature precludes the use of noble metal conductors such as gold and platinum. As a result, substrates formed by high temperature processing are limited to the use of refractory metal conductors such as tungsten and molybdenum, which have very low resistance to corrosion in the presence of moisture and are therefore not appropriate for use in harsh environments.
Low temperature ceramic co-fire (LTCC) techniques also utilize green sheets of ceramic materials. Low-temperature techniques do not require the use of a reducing atmosphere during firing and therefore may employ noble metal conductors. However the dielectric materials used in low-temperature processes are generally provided with a high glass content and therefore have relatively poor resistance to environmental corrosion, as well as a relatively low dielectric constant and relatively poor thermal conductivity.
Thick film (TF) techniques form multilayer substrates by firing individual dielectric layers and then laminating the layers to form a multilayer stack. However, thick film techniques require the use of relatively thick dielectric layers and thus it is difficult to produce a thin multilayer substrate using thick film techniques. Thick film dielectrics also have relatively low dielectric constants, relatively poor thermal conductivity, and poor corrosion resistance.
In addition to the problems listed above, the conventional lamination techniques cannot use green sheets of less than 0.006 inches in thickness because thinner green sheets cannot reliably survive necessary processing such as drilling or punching of via holes. Also, because the designer has limited control over the thickness of individual green sheets, the number of layers of the multilayer substrate is often limited according to the maximum allowable substrate thickness for the intended application. Thus, where a thin multilayer substrate is desired, lamination techniques generally do not provide optimal results.
In addition, the firing required in the conventional lamination techniques can cause shrinkage in excess of 10% in both dielectric and conductor materials, which can produce distortions that result in misalignment of vias and conductors after firing. While shrinkage effects can be addressed to some extent during design for substrates having a modest interconnect density, the design process is made more time consuming and a significant reduction in yield may occur in applications with higher densities and tighter dimensional tolerances.
The conventional technology is therefore limited by several restrictions. All of the aforementioned techniques are limited with respect to the minimum substrate thicknesses that can be produced, and the various firing requirements of the aforementioned techniques prevent the use of materials that are desirable for circuit structures. All of the aforementioned techniques also suffer from shrinkage during firing that causes alignment problems.